Details
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Task
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Resolution: Fixed
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P4: Low
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None
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a7f227f56 (dev), 61bd614ab (dev), 684aec428 (6.7), 0c4d4cfa0 (dev), ba823e3a5 (6.8), 113710a2b (6.7), 31df1a2e5 (tqtc/lts-6.5)
Description
Implement qYieldCpu() for RISC-V architectures (if the architecture has such an instruction).
Attachments
Issue Links
- depends on
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- Closed
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- is required for
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QTBUG-116215
Test StarFive RISC-V HW with Boot2Qt
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- Closed
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| For Gerrit Dashboard: QTBUG-103014 | ||||||
|---|---|---|---|---|---|---|
| # | Subject | Branch | Project | Status | CR | V |
| 489954,15 | Make qYieldCpu() public API | dev | qt/qtbase | Status: MERGED | +2 | 0 |
| 541917,7 | Fix the instruction of RISC-V arch that yield CPU | dev | qt/qtbase | Status: MERGED | +2 | 0 |
| 544034,2 | Fix the instruction of RISC-V arch that yield CPU | 6.7 | qt/qtbase | Status: MERGED | +2 | 0 |
| 581611,4 | qYieldCpu(): compile in strict C11 mode | dev | qt/qtbase | Status: MERGED | +2 | 0 |
| 582394,2 | qYieldCpu(): compile in strict C11 mode | 6.8 | qt/qtbase | Status: MERGED | +2 | 0 |
| 582469,2 | qYieldCpu(): compile in strict C11 mode | 6.7 | qt/qtbase | Status: MERGED | +2 | 0 |
| 582633,3 | qYieldCpu(): compile in strict C11 mode | tqtc/lts-6.5 | qt/tqtc-qtbase | Status: MERGED | +2 | +1 |