Illegal instruction in QtWebEngine example on Renesas RZ/G2L board

Qt version: 6.9.0

Image: b2qt

Board: Renesas RZ/G2L

Architecture: Dual-Core Arm Cortex-A55 CPUs and Single-Core Cortex-M33 CPU

Application: smart home demo that uses QtWebEngine

error log:

Thread 1 "SmartHomeUIApp" received signal SIGILL, Illegal instruction.
0x0000ffffd1f37b4c in sha1_block_data_order_hw ()
   from /usr/lib/libQt6WebEngineCore.so.6
(gdb) bt
#0  0x0000ffffd1f37b4c in sha1_block_data_order_hw ()
   from /usr/lib/libQt6WebEngineCore.so.6
#1  0x0000ffffd6412fb8 in BCM_sha1_final ()
   from /usr/lib/libQt6WebEngineCore.so.6
#2  0x0000ffffd6432050 in SHA1 () from /usr/lib/libQt6WebEngineCore.so.6
#3  0x0000ffffd6432050 in SHA1 () from /usr/lib/libQt6WebEngineCore.so.6
#4  0x0000ffffd6432050 in SHA1 () from /usr/lib/libQt6WebEngineCore.so.6
#5  0x0000ffffd6432050 in SHA1 () from /usr/lib/libQt6WebEngineCore.so.6
#6  0x0000ffffd6432050 in SHA1 () from /usr/lib/libQt6WebEngineCore.so.6
#7  0x0000ffffd6432050 in SHA1 () from /usr/lib/libQt6WebEngineCore.so.6
#8  0x0000ffffd6432050 in SHA1 () from /usr/lib/libQt6WebEngineCore.so.6
#9  0x0000ffffd6432050 in SHA1 () from /usr/lib/libQt6WebEngineCore.so.6

Can be temporarily fixed by return 0 in the following functions.

qtwebengine/src/3rdparty/chromium/third_party/boringssl/src/crypto/internal.h

OPENSSL_INLINE int CRYPTO_is_ARMv8_AES_capable(void) 

OPENSSL_INLINE int CRYPTO_is_ARMv8_PMULL_capable(void) 

OPENSSL_INLINE int CRYPTO_is_ARMv8_SHA1_capable(void)

OPENSSL_INLINE int CRYPTO_is_ARMv8_SHA256_capable(void) 

OPENSSL_INLINE int CRYPTO_is_ARMv8_SHA512_capable(void)