Priority: P3: Somewhat important
Affects Version/s: 5.13.1, 5.14.0 Alpha
Fix Version/s: 5.13.2
Component/s: Build System
Environment:ICC 19.1 Technical Preview (package 085), ICC 19.0.5, Windows 10 x64, Windows SDK 10.0.18362.0, MSVC 2019 16.3.1 (VC++ 14.22), MSVC 2019 16.4 preview 1 (VC++ 14.24.28117)
The following elusive ICE-like error during link emerges when compiling any qttool or example using Qt5Gui with ICC 19.x under LTCG/IPO:
Line 25 (https://github.com/qt/qtbase/blob/5.14/mkspecs/win32-icc/qmake.conf) is wrong because that is not the correct option to disable IPO on Windows ICC 19:
The correct form should be:
The implication is that the CONFIG feature "simd" modulating the compilation of specific ISA optimized sources in simd.prf now correctly disables IPO on intel_icl (line 31 https://github.com/qt/qtbase/blob/5.14/mkspecs/features/simd.prf):
For the adventurous: patch for enabling full LTCG/IPO with ICC 19.x (successfully tested in all of the aforementioned environments):
Change line 25 (https://github.com/qt/qtbase/blob/5.14/mkspecs/win32-icc/qmake.conf) to:
Add this line to win32-icc description file (https://github.com/qt/qtbase/blob/5.14/mkspecs/win32-icc/qmake.conf):
Change simd.prf (line 21 https://github.com/qt/qtbase/blob/5.14/mkspecs/features/simd.prf):
According to this commit (Fix leaking ISA extensions in LTCG builds), "(...) common subexpression elimination instruction set extensions may leak from the objects where they were enabled when doing link-time optimizations. To avoid that this patch disables LTCG/LTO on files built with extra instruction set extensions". While this may be true for other compilers using interprocedural optimizations, on a translation unit or whole-program basis, it seems that ICC 19.x can successfully apply whole-program global optimizations across object files using different extra ISA sets. The only requirement is that the intermediate language (IL) in the (mock) objects files generated during compile-time use the same feature set setting (e.g., -xCORE-AVX2, -xSSE4.1) across all files and during link-time. Alternatively, all object files must be compiled and linked using the same highest instruction set available on the compilation host processor (-xHOST). The -xHOST option does exactly that: it tells the compiler to generate instructions for the highest instruction set available on the compilation host processor. In short, the error with IPO arises because "simd.prf" sets, e.g., the qdrawhelper_avx2, qdrawhelper_sse4 and the qdrawhelper_sse2 units to generate intermediate objects using different ISA targets, -QxCORE-AVX2, -Qx SSE4.1, -QxSSE2, instead of using the highest compatible ISA (in this case -QxCORE-AVX2), which confuses the linker in the final phase.
ICC 19.x is able to analyze global optimizations opportunities across intermediate object files and automatically avoid the "border" or leak effects on programs built with extra ISA. Additionally, it avoids AVX-SSE transition penalties by generating equivalent AVX-128 code from SSE intrinsics, skipping _mm256_zeroupper() whenever necessary — provided all the objects are compiled and linked using the same (or the highest available) feature set setting. According to "Intel 64 and IA-32 Architectures Optimization Reference Manual" and Intel's "Avoiding AVX-SSE Transition Penalties", this is the recommended procedure if you are targeting only one architecture per program. It is not the recommended procedure if you are interested in using Intel's auto-dispatching feature (e.g., -axCORE-AVX2, -axSSE4.1). Some critical modules may work better when using only SSE, but the automatic coarse-grained optimizations made by ICC 19.x seems to compile programs mixing SSE and AVX successfully.